Dr. Praveen Kumar Alapati

Praveen Kumar Alapati

Assistant Professor
praveenkumar.alapati@mahindrauniversity.edu.in

Dr. Praveen Kumar Alapati is a faculty member in the Department of Computer Science and Engineering at Ecole Centrale School of Engineering, Mahindra University. He got the Ph.D. in Computer Science and Engineering from the prestigious institution IIT Madras in the area of High-Performance Computing. His research interests include High-Performance Computing ( Heterogeneous Computing), GPU Architectures, and Multicore Architectures.
He is associated with the Supercomputing Lab of Mahindra University. Also, He has been working with the National Supercomputing Mission (NSM) of India since 2021. He conducted a few short-term courses and workshops through NSM. He is a member of professional societies: IEEE and ACM. He worked as a visiting faculty member of Indian Institute of Information Technology, Sri City (Jan-June 2018) and Acharya Nagarjuna University (Oct-2006 to Mar-2008).
Also, He served as a Coordinator at Institute for Electronic Governance, A.P., from Nov-2004 to Aug-2005. He has been extending his services to frame the course structure and syllabus of CSE Dept. RVR & JC College of Engineering, Since 2020. He is a reviewer for Concurrency and Computation: Practice and Experience Journal ( Wiley ).

Dr. Praveen is ready to work with the software industry in the area of High-Performance Computing. He will extend consultancy services. Please feel free to approach him.

Ph.D.

  • Ph.D. in Computer Science and Engineering from IIT Madras.

M.Tech

  • M.Tech in Computer Science and Technology from Andhra University College of Engineering, AU.

B.Tech

  • B.Tech in Computer Science and Engineering from R.V.R and J.C. College of Engineering, ANU.

  • Teaching: 11 Years and Research: 7.5 years

2012 - 2020

  • Research Scholar and Teaching Assistant at IIT Madras from July 2012 to February 2020.

Faculty Member at

2009 - 2012

  • GITAM University from January 2009 to July 2012.

2008

  • R.V.R & J.C. College of Engineering from January to November 2008

2006 - 2008

  • V.R.Siddhartha Engineering College from August 2006 to December 2008.

2001 - 2006

  • Vignan’s Engineering College from August 2001 to July 2006,

2000 - 2001

    • Nagarjuna Institute of Technology and Science from December 2000 to July 2001.

Subjects-Handled: High-Performance Computing, Parallel and Concurrent Programming, GPU Programming, Analysis of Algorithms, Problem Solving with C (Java), Data Structures, Discrete Mathematics, Theory of Computation, Compilers, Digital Logic Design, Computer Organization, Microprocessors- and-Interfacing, Advanced Algorithms.

Reviewer:

  • Concurrency and Computation: Practice and Experience (Journal).

2020

  • A Scalable and Energy-efficient Concurrent Binary Search Tree with Fatnodes. IEEE Transactions on Sustainable Computing (DOI:10.1109/TSUSC.2020.2970034).

    • DOI:10.1007

  • Concurrent Treaps and Impact of Locking Objects. New Generation Computing Journal. (DOI:10.1007/s00354-019-00073-z).

    • 2018

  • Poster Presentation on Concurrent Binary Search Trees with Fatnodes in 12th Inter-Research-Institute Student Seminar in Computer Science, 2018.

    • 2017

    • FatCBST: Concurrent Binary Search Tree with Fatnodes. Appeared in High-Performance Computing and Communications (HPCC), IEEE, pp. 356-363, 2017. Presented in Bangkok, Thailand. (DOI: 10.1109/HPCC-SmartCity-DSS.2017.47).
    • Concurrent Treaps. Appeared in Algorithms and Architectures for Parallel Processing (ICA3PP), Proceedings in Lecture Notes in Computer Science, Springer, Vol. 10393, pp.776-790, 2017. Presented at Helsinki, Finland. (DOI: 10.1007/978-3-319-65482-9_63).
    • Research Interests: Concurrent Data Structures and High-Performance Computing.

    My Ph.D. thesis is on Scalable and Efficient Concurrent Binary Search Trees (Month and Year: February 2020). In general, devising algorithms for concurrent data structures has been propelled by the need for scalability. Recently, there has been increased traction across the industry towards energy-efficient concurrent data structure designs. In order to construct efficient concurrent data structures and algorithms, we present scalable and energy-efficient concurrent implementations for binary search trees in our thesis. We propose two concurrent search tree implementations: Concurrent Binary Search Tree with Fatnodes (FatCBST) and Concurrent Treaps. We also studied the impact of locking objects in concurrent implementations.

    My M.Tech thesis is on Framework for Specification Driven Application Compiler. It generates Java Programs for the typical specification file, written in Web Application Specification Language.

    Ph.D. Scholars:

    • Sri. Brahmaiah Grandham ( Research Area: Designing Locks)
    • Sri. Kapil Kumar Attinagaramu (Research Area: Concurrent Data Structures)

     

    Others

    Achievements:

    • Star Teaching Assistant at IIT Madras (Two times: 2013 and 2018).
    • Secured 99.4 percentile in GATE.

    Positions Held:

    • Visiting Faculty of Indian Institute of Information Technology, Sri City from Jan-June 2018.
    • Guest Faculty of Acharya Nagarjuna University from Oct-2006 to Mar-2008.
    • Coordinator at Institute for Electronic Governance, A.P., from Nov-2004 to Aug-2005.

    Conferences & Workshops / Seminars Attended

    • Indo-German Winter School on Algorithms for Big-Data, IIIT Delhi, Feb 9-13, 2020.
    • High-Performance Computing and Communications (HPCC), Bangkok, Thailand, Dec 18-21, 2017.
    • International Conference in Algorithms and Architectures for Parallel Processing (ICA3PP), Helsinki, Finland, Aug 21-23, 2017.
    • POPL (Principles of Programming Languages) conference, TIFR Mumbai, Jan12-18, 2015.
    • Insight 09 ver2.0 conducted by Infosys, Nov 8-9, 2009.
    • Agile Programming short-term training program IIT Madras conducted May 19 -31, 2008.
    • 1st India Software Engineering Conference Organized by ACM and IIIT Hyderabad, Feb 20-21, 2008.
    • Open Knowledge Initiatives (OKI) Workshop conducted in collaboration with MIT (Massachusetts Institute of Technology), CSU (California State University), and Institute for Electronic Governance from Jan 16-19, 2007.
    • Campus Connect, Faculty Enablement Program (FEP) conducted by Infosys from Nov 26 to Dec 08, 2006.

    Minor Project on Data Standards sponsored by Computer Society of India. The objective is to study how data should be described and recorded in a consistent format.

    Co-curricular Activities:

    • Organized a short-term course on Concurrent Programming through National Supercomputing Mission from July 25-30, July 2022
    • Worked for the National Program on Technology Enhanced Learning (NPTEL) courses on Digital Logic Design and Computer Architecture at IIT Madras from 2015- 2016
    • TA for the Global Initiative for Academic Networks (GIAN) course on Emerging Computational Devices, Architectures and Computational Models, IIT Madras, Dec 11-15, 2017.

    Outreach Programs:Delivered lectures on Concurrent Programming (Multi-core Programming) at

    • Gokaraju Rangaraju Institute of Engineering and Technology, March 31, 2021.
    • VNR Vignana Jyothi on July 13, 2019.
    • Indian Institute Technology Tirupati on March 28, 2019.
    • JNTU University Vizianagaram on March 07, 2019.
    • Vignan’s Institute of Information Technology on February 27, 2019.
    • Vignan’s Institute of Engineering for Women on February 22, 2109.
    • GITAM University on February 18, 2019.